<table>
<thead>
<tr>
<th>index</th>
<th>Category</th>
<th>Defective Details</th>
<th>kernel-launch/event_overhead:0</th>
<th>kernel-launch/event_overhead:1</th>
<th>kernel-launch/event_overhead:2</th>
<th>kernel-launch/event_overhead:3</th>
<th>kernel-launch/event_overhead:4</th>
<th>kernel-launch/event_overhead:5</th>
<th>kernel-launch/event_overhead:6</th>
<th>kernel-launch/event_overhead:7</th>
<th>kernel-launch/return_code</th>
<th>kernel-launch/wall_overhead:0</th>
<th>kernel-launch/wall_overhead:1</th>
<th>kernel-launch/wall_overhead:2</th>
<th>kernel-launch/wall_overhead:3</th>
<th>kernel-launch/wall_overhead:4</th>
<th>kernel-launch/wall_overhead:5</th>
<th>kernel-launch/wall_overhead:6</th>
<th>kernel-launch/wall_overhead:7</th>
<th>mem-bw/D2H_Mem_BW:0</th>
<th>mem-bw/D2H_Mem_BW:1</th>
<th>mem-bw/D2H_Mem_BW:2</th>
<th>mem-bw/D2H_Mem_BW:3</th>
<th>mem-bw/D2H_Mem_BW:4</th>
<th>mem-bw/D2H_Mem_BW:5</th>
<th>mem-bw/D2H_Mem_BW:6</th>
<th>mem-bw/D2H_Mem_BW:7</th>
<th>mem-bw/H2D_Mem_BW:0</th>
<th>mem-bw/H2D_Mem_BW:1</th>
<th>mem-bw/H2D_Mem_BW:2</th>
<th>mem-bw/H2D_Mem_BW:3</th>
<th>mem-bw/H2D_Mem_BW:4</th>
<th>mem-bw/H2D_Mem_BW:5</th>
<th>mem-bw/H2D_Mem_BW:6</th>
<th>mem-bw/H2D_Mem_BW:7</th>
<th>mem-bw/return_code</th>
</tr>
</thead>
<tbody>
<tr>
<td>sb-validation-01</td>
<td>KernelLaunch</td>
<td>kernel-launch/event_overhead:0(B/L: 0.0060 VAL: 0.1000 VAR: 1577.85% Rule:lambda x:x&gt;0.05)</td>
<td>1577.85%</td>
<td>-0.17%</td>
<td>-6.54%</td>
<td>-7.72%</td>
<td>-0.67%</td>
<td>-1.17%</td>
<td>-4.03%</td>
<td>-1.01%</td>
<td>0</td>
<td>0.0%</td>
<td>0.0%</td>
<td>1.95%</td>
<td>2.24%</td>
<td>3.61%</td>
<td>-1.95%</td>
<td>1.85%</td>
<td>4.39%</td>
<td>0.0%</td>
<td>1.23%</td>
<td>0.82%</td>
<td>1.23%</td>
<td>0.0%</td>
<td>0.0%</td>
<td>-1.65%</td>
<td>1.23%</td>
<td>0.0%</td>
<td>0.78%</td>
<td>1.56%</td>
<td>1.95%</td>
<td>2.34%</td>
<td>0.78%</td>
<td>-1.17%</td>
<td>1.95%</td>
<td>0</td>
</tr>
<tr>
<td>sb-validation-03</td>
<td>FailedTest</td>
<td>mem-bw/D2H_Mem_BW:0_miss,mem-bw/D2H_Mem_BW:1_miss,mem-bw/D2H_Mem_BW:2_miss,mem-bw/D2H_Mem_BW:3_miss,mem-bw/D2H_Mem_BW:4_miss,mem-bw/D2H_Mem_BW:5_miss,mem-bw/D2H_Mem_BW:6_miss,mem-bw/D2H_Mem_BW:7_miss,mem-bw/H2D_Mem_BW:0_miss,mem-bw/H2D_Mem_BW:1_miss,mem-bw/H2D_Mem_BW:2_miss,mem-bw/H2D_Mem_BW:3_miss,mem-bw/H2D_Mem_BW:4_miss,mem-bw/H2D_Mem_BW:5_miss,mem-bw/H2D_Mem_BW:6_miss,mem-bw/H2D_Mem_BW:7_miss,mem-bw/return_code(VAL: 1.0000 Rule:lambda x:x&gt;0)</td>
<td>0.0%</td>
<td>-0.17%</td>
<td>-6.54%</td>
<td>-7.72%</td>
<td>-0.67%</td>
<td>-1.17%</td>
<td>-4.03%</td>
<td>-1.01%</td>
<td>0</td>
<td>0.0%</td>
<td>0.0%</td>
<td>1.95%</td>
<td>2.24%</td>
<td>3.61%</td>
<td>-1.95%</td>
<td>1.85%</td>
<td>4.39%</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>N/A</td>
<td>1</td>
</tr>
</tbody>
</table>